October 2024
From: Brian, Tobias and Gaby
Subject: EDA and opportunities in chip design
Last month, we wrote about ex-GPU infra – everything surrounding the GPU within an entire system (e.g. memory, networking, energy, etc.) The GPU is like LeBron James, hamstrung by a JV team. This limitation is amplified by skyrocketing demand for AI workloads, creating a dynamic where, for the first time in decades, hardware is the core bottleneck to technological progress.
To internalize this reality, look no further than the NVIDIA stock price or the $1T+ of capex being directed to AI data centers over the next few years, with hyperscalers leading the way. This boom is sending shockwaves through an industry that has many stodgy corners occupied by incumbents who haven’t operated in the limelight for decades.
We’ve become obsessed with opportunities tied to the semis value chain. The ecosystem surrounding the GPU has lagged behind in terms of innovation, and that includes how chips are designed and tested before being sent to a fab. So, while last month we wrote about components that sit within a physical system in a data center, this month we are taking an even bigger step back to discuss the software that underpins the entire semis industry – EDA.
The EDA market
EDA (Electronic Design Automation) is a critical part of the semiconductor value chain. EDA software is used for the design, verification, and testing of electronic systems.
The EDA market is dominated by three major players: Synopsys, Cadence, and Siemens (solidified by their acquisition of Mentor Graphics in 2017), with the top three players owning over 85% of the market. Synopsys and Cadence are both $84B+ market cap companies, established in 1986 and 1983 respectively. In a dramatic contrast to the globalized industries that make up the rest of the semiconductor supply chain, a majority of the EDA market is US based.
Due to the concentration of design in the chip industry, 90% of the revenue of the three biggest EDA players comes from the top 10-15 semiconductor vendors. One reason for this is that EDA solutions are incredibly expensive. Intel pays over $1B annually for Synopsys’ EDA software. Samsung has apparently struck a similar deal with Mentor Graphics (now Siemens).
Although EDAs traditionally sold software on a per-seat model, their business model has evolved to include selling IP, where much of the value in semis truly lies. Customers can license blocks of IP from Synopsys and other EDAs for memory standards, on-chip security, improved data processors, and more, reducing design risk and speeding up time to market. In 2023, Synopsys’ design automation unit brought in $3.8B, while IP brought in $1.5B, with the Synopsys CEO telling Ben Thompson that IP is growing faster.
The rise of EDAs as a core input to the physical chip, via licensing of IP, means they play an even more critical role in the ecosystem. As a result, some believe they are undervalued. A former CMO at Synopsys stated, “I think the [EDAs] are still undervalued even though their stock has been rising… I still believe the industry is still trying to find its relevance in the bigger picture… it enables a much, much bigger business, but also just human daily life.”
EDAs are the underpinning for the semiconductor industry – the infra for the infra. However, there may be latent value that is still unrealized in this market, in addition to tremendous tailwinds coming from the AI boom. Additionally, from talking to startups, we believe EDAs have vulnerabilities. There are parts of the design and validation process they do not touch, and their increased focus on IP over the core EDA product means they may be caught flat-footed by startups better utilizing AI and other technologies. They are also famously expensive, have poor DevEx, and require immense knowledge to use well.
As a result of all of this, we’re at an exciting time for the market. There is more value left to capture, and a question as to who will capture it.
Is there room for startups?
EDA incumbents have product, distribution, talent, and massive data/tech advantages coming from customer engagements spanning decades. They have deeply entrenched relationships with their customers, and earned trust to have access to their customers’ designs and secret sauce. All of this makes EDAs a formidable incumbent to go up against. One relevant comparable is Autodesk’s AutoCAD product, the leader in CAD for large-scale physical design. Although Autodesk is an old incumbent that people love to complain about, they have been impossible to unseat. Their AutoCAD product line does ~$1.5B in annual revenue alone, with minimal signs of slowing down.
However, times are changing, and we believe AI is opening the door to disrupt industries that previously seemed immune to disruption – the EDA market is one of them.
There are two AI-related tailwinds at play for the EDA market:
AI that automates design processes:
Designing and verifying chips involves a set of discrete and manual workflows, performed by large teams. Over the last year or so, we have spoken to a number of teams trying to automate these workflows that are not sufficiently covered by traditional EDAs. This use of AI is similar to that of other industries – capitalize on the magic of LLMs to synthesize information and generate outputs, but at the speed and efficiency of machines. Examples of places we’ve seen this applied include:
AI that designs chips:
Additionally, AI is leading to the design of the most complex chips the world has ever seen. Training and inference will require so much parallelized compute that the chips needed to support bigger and bigger models will only get increasingly complex. This increase in chip complexity necessitates transitioning to smaller nodes to fit more onto a chip, and in all likelihood new technologies and methods for squeezing compute into the smallest possible areas.
Pushing the boundaries of physics to increase the capabilities of chips will require superhuman helpers. In a recent interview, Jensen Huang said that the Hopper chip architecture would have been impossible to design without AI chip designers that NVIDIA uses internally. Sassine Ghazi, CEO of Synopsys, described chip design pre and post AI: “A traditional workflow before AI... it’s serial work. With AI, you need two things. You need more machines so you can do a much broader space of exploration, and you need more EDA software to run. Instead of, let’s say, four or five jobs per engineer, you may run thousands.”
In other words, optimal chip architectures may be beyond human imagination. As we're seeing with discovering new materials or proteins, the best chip designs may emerge from millions of guesses from an AI that has some goal in mind, operating much faster than a human ever could.
AI is pushing the boundaries and capabilities of EDAs, and that could create opportunities for startups. Some problems those startups could solve include:
In a recent interview with Ben Thompson, Ghazi said, “When you look at the modern chip, it’s no longer the same chip approach workflow methodology that was designed say five years ago, it’s a system that you’re designing, and Synopsys is going through that transformation of providing solutions not only at the silicon level but a silicon-to-system level solution.”
We believe there will be big businesses built on the back of AI powering this transformation in the EDA market. In particular, a few areas of interest for new startups include:
As always, please let us know if you have any feedback or thoughts. And, if you know any founders building in the AI x EDA market, we’d love to meet them!
Until next time,
B, T & G